ESD5311N will semiconductor ltd. 1 revision 1.4, 2018/06/25 esd 531 1n 1 - line , b i - d irectional, ultra - low capacitance trans ient voltage suppressors descriptions the esd531 1n is a n ultra - low capacitance tvs (tran sient voltage suppressor) designed to protect high speed data interfaces. it has been specifically design ed to protect sensitive electronic components which are connected to data and transmission lines from over - stress caused by esd (e lectro s tatic d ischarge ) . the esd531 1n incorporates one pair of ultra - low capacitance steering diodes plus a tvs diode. the es d531 1n may be used to provide esd protection up to 20kv (contact discharge ) according to iec61000 - 4 - 2 , and withstand peak pulse current up to 4a ( 8/20 s ) according to iec61000 - 4 - 5. the esd53 1 1n is available in dfn1006 - 2l package. standard products are pb - free and halogen - free. features ? stand - off voltage: 5 v max . ? transient protection for each line according to iec61000 - 4 - 2 (esd) : 20kv ( contact discharge ) iec61000 - 4 - 5 (surge): 4 a (8/20 s) ? ultra - low capacitance: c j = 0. 25 pf typ. ? ultra - low leakage curre nt: i r < 1na typ. ? l ow clamping voltage : v cl = 2 1 v t yp. @ i pp = 16a (tlp) ? solid - state silico n technology applications ? usb 2.0 and usb 3.0 ? hdmi 1.3 and hdmi 1.4 ? sata and esata ? dvi ? ieee 1394 ? pci express ? portable electronics ? notebooks h ttp // : www.willsemi.com dfn1006 - 2 l (bottom v iew) pin c onfiguration 8 = device code * = month code ( a~z) marking (top view) order i nformation device package shipping esd5311 n - 2/tr dfn1006 - 2l 10 000/tape&reel p i n 1 p i n 2 p i n 1 p i n 2 8 *
ESD5311N will semiconductor ltd. 2 revision 1.4, 2018/06/25 absolute m aximum r ating s electrical characteristics (t a =25 o c, unless otherwise noted) notes: 1) tlp parameter: z 0 = 50, t p = 100ns, t r = 2n s, averaging window from 60ns to 80ns. r dyn is calculated from 4a to 16a. 2) contact discharge mode, according to iec61000 - 4 - 2. 3) non - repetitive current pulse, according to iec61000 - 4 - 5. para meter symbol rating unit peak pulse power ( t p = 8/20 s) p pk 84 w peak pulse current (t p = 8/20 s) i pp 4 a esd according to iec61000 - 4 - 2 air discharge v esd 2 0 k v esd according to iec61000 - 4 - 2 contact discharge 2 0 junction temperature t j 125 o c ope rating temperature t op - 40~85 o c lead temperature t l 260 o c storage temperature t stg - 55~150 o c parameter symbol condition min. typ. max. unit rever se maximum working voltage v rwm 5.0 v rever se leakage current i r v rwm = 5 v <1 1 00 n a rever se breakdown voltage v br i t = 1ma 7.5 9 . 0 10 .0 v clamping voltage 1) v cl i pp = 16a, t p = 100ns 2 1 .0 v dynamic resistance 1) r dyn 0.7 clamping voltage 2 ) v cl v esd = 8kv 21 v clamping voltage 3 ) v cl i pp = 1a, t p = 8/20s 1 4 v i pp = 4a , t p = 8/20s 2 1 v junction capacitance c j v r = 0v, f = 1mhz any i/o pin to gnd 0.25 0.4 pf
ESD5311N will semiconductor ltd. 3 revision 1.4, 2018/06/25 typical characteristics (t a =25 o c, unless otherwise noted ) 8/20 s w aveform per iec61000 - 4 - 5 clamping voltage vs. peak pulse current non - repetitive peak pulse p ower vs. pulse time contact discharge current waveform per iec61000 - 4 - 2 capacitance vs. rever se voltage power derating vs. ambient t emperature 0 25 50 75 100 125 150 0 20 40 60 80 100 % of rated power t a - ambient temperature ( o c) t 60ns 30ns t r = 0.7~1ns 10 90 100 current (%) time (ns) -5 -4 -3 -2 -1 0 1 2 3 4 5 0.20 0.22 0.24 0.26 0.28 f = 1mhz v ac = 50mv c j - junction capacitance (pf) v r - reverse voltage (v) 0 0 100 20 90 50 10 t 2 t 1 front time: t 1 = 1.25 ? ? t = 8 ? s time to half-value: t 2 = 20 ? s peak pulse current (%) time ( ? s) t 1 2 3 4 10 12 14 16 18 pulse waveform: t p = 8/20 ? s v c - clamping voltage (v) i pp - peak pulse current (a) 1 10 100 1000 1 10 100 1000 peak pulse power (w) pulse time ( ? s)
ESD5311N will semiconductor ltd. 4 revision 1.4, 2018/06/25 typical characteristics (t a =25 o c, unless otherwise noted ) esd clamping ( +8kv contact discharge per iec61000 - 4 - 2) tlp measurement esd clamping ( - 8kv contact discharge per iec61000 - 4 - 2 ) -25 -20 -15 -10 -5 0 5 10 15 20 25 -20 -16 -12 -8 -4 0 4 8 12 16 20 z 0 = 50 ? t r = 2ns t p = 100ns tlp current (a) tlp voltage (v)
ESD5311N will semiconductor ltd. 5 revision 1.4, 2018/06/25 package outline dimensions dfn1006-2l ?? symbol dimensions in millimeters min. typ. max. a 0.34 0.45 0.53 a1 0.00 0.02 0.05 a3 0.12 ref. d 0.95 1.00 1.08 e 0.55 0.60 0.68 b 0.20 0.25 0.30 l 0.45 0.50 0.55 e 0.65 bsc recommended pcb layout (unit: mm) ( ) ( ) ( ) ( ) ( ) d e b l e a a3 a1 top view bottom view side view notes: this recommended land pattern is for reference purposes only. please consult your manufacturing group to ensure your pcb design guidelines are met. 0.55 0.60 0.85 1.40 0.30
ESD5311N will semiconductor ltd. 6 revision 1.4, 2018/06/25 tape and reel information reel dimensions tape dimensions quadrant assignments for pin1 orientation in tape rd reel dimension w overall width of the carrier tape 1 p1 pitch between successive cavity centers pin1 pin1 quadrant user direction of feed rd w p1 q1 q2 q3 q4 q1 q2 q3 q4 7inch 13inch 2mm 4mm 8mm q1 q2 q3 q4 8mm 12mm 16mm
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